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Timing simulation analyzer |
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poniedziałek, 08 styczeń 2007 |
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Q: I am looking for a program that could display simulation timings diagrams of my Verilog design.
A: I recommend excellent GTKWAVE - it's free, open source, uses GTK 1 or 2 and can display also other timing analysis formats. Very good contact with author Anthony J Bybell - greetings! :-)
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